DesignWare HDMI bridge bindings

Required properties:
- compatible: platform specific such as:
   * "snps,dw-hdmi-tx"
   * "fsl,imx6q-hdmi"
   * "fsl,imx6dl-hdmi"
   * "rockchip,rk3288-dw-hdmi"
- reg: Physical base address and length of the controller's registers.
- interrupts: The HDMI interrupt number
- clocks, clock-names : must have the phandles to the HDMI iahb and isfr clocks,
  as described in Documentation/devicetree/bindings/clock/clock-bindings.txt,
  the clocks are soc specific, the clock-names should be "iahb", "isfr"
-port@[X]: SoC specific port nodes with endpoint definitions as defined
   in Documentation/devicetree/bindings/media/video-interfaces.txt,
   please refer to the SoC specific binding document:
    * Documentation/devicetree/bindings/display/imx/hdmi.txt
    * Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt

Optional properties
- reg-io-width: the width of the reg:1,4, default set to 1 if not present
- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing,
  if the property is omitted, a functionally reduced I2C bus
  controller on DW HDMI is probed
- clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec"

Example:
	hdmi: hdmi@0120000 {
		compatible = "fsl,imx6q-hdmi";
		reg = <0x00120000 0x9000>;
		interrupts = <0 115 0x04>;
		gpr = <&gpr>;
		clocks = <&clks 123>, <&clks 124>;
		clock-names = "iahb", "isfr";
		ddc-i2c-bus = <&i2c2>;

		port@0 {
			reg = <0>;

			hdmi_mux_0: endpoint {
				remote-endpoint = <&ipu1_di0_hdmi>;
			};
		};

		port@1 {
			reg = <1>;

			hdmi_mux_1: endpoint {
				remote-endpoint = <&ipu1_di1_hdmi>;
			};
		};
	};
